<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Embedded Coffe</title><link>https://embeddedcoffe.my.id/</link><description>Recent content on Embedded Coffe</description><generator>Hugo</generator><language>en-US</language><lastBuildDate>Tue, 25 Aug 2026 11:00:00 +0000</lastBuildDate><atom:link href="https://embeddedcoffe.my.id/index.xml" rel="self" type="application/rss+xml"/><item><title>Designing Ultra-Low Noise Power Rails for Precision ADCs</title><link>https://embeddedcoffe.my.id/posts/designing-low-noise-power-supplies/</link><pubDate>Tue, 25 Aug 2026 11:00:00 +0000</pubDate><guid>https://embeddedcoffe.my.id/posts/designing-low-noise-power-supplies/</guid><description>&lt;p&gt;High-resolution analog-to-digital converters (24-bit Delta-Sigma ADCs like the ADS1256 or AD7175) require millivolt-clean reference rails. A few microvolts of ripple on your $V_{REF}$ or $AV_{DD}$ can easily degrade effective number of bits (ENOB) from 20 bits down to 14 bits.&lt;/p&gt;
&lt;h2 id="linear-regulators-vs-switcher-post-regulation"&gt;Linear Regulators vs Switcher Post-Regulation&lt;/h2&gt;
&lt;p&gt;While buck converters offer &amp;gt;90% power efficiency, their high $di/dt$ switching harmonics can radiate across PCB planes. The best practice for mixed-signal systems is a hybrid &lt;strong&gt;SMPS + Low-Dropout (LDO)&lt;/strong&gt; topology:&lt;/p&gt;</description></item><item><title>Building an Isolated NMEA 2000 Gateway with ESP32</title><link>https://embeddedcoffe.my.id/posts/marine-nmea-2000-esp32-gateway/</link><pubDate>Thu, 20 Aug 2026 08:15:00 +0000</pubDate><guid>https://embeddedcoffe.my.id/posts/marine-nmea-2000-esp32-gateway/</guid><description>&lt;p&gt;Marine electronics rely on &lt;strong&gt;NMEA 2000&lt;/strong&gt; (N2K), a standardized protocol built on top of Bosch CAN 2.0B (Controller Area Network) operating at 250 kbps with J1939-based 29-bit identifiers.&lt;/p&gt;
&lt;p&gt;In this project, we design an isolated hardware gateway that bridges N2K PGN messages directly into an MQTT stream for vessel dashboards.&lt;/p&gt;
&lt;h2 id="hardware-architecture--galvanic-isolation"&gt;Hardware Architecture &amp;amp; Galvanic Isolation&lt;/h2&gt;
&lt;p&gt;Boats often have multiple battery banks with distinct ground references. Directly connecting an ESP32 to the CAN bus without isolation risks ground loops, alternator noise, and damaged silicon.&lt;/p&gt;</description></item><item><title>Mastering FreeRTOS Task Scheduling on STM32</title><link>https://embeddedcoffe.my.id/posts/stm32-freertos-task-scheduling/</link><pubDate>Mon, 10 Aug 2026 14:30:00 +0000</pubDate><guid>https://embeddedcoffe.my.id/posts/stm32-freertos-task-scheduling/</guid><description>&lt;p&gt;When transitioning from a simple super-loop (&lt;code&gt;while(1)&lt;/code&gt;) architecture to a Real-Time Operating System (RTOS), understanding the scheduler&amp;rsquo;s behavior is vital for predictable and crash-free execution.&lt;/p&gt;
&lt;p&gt;In this article, we dissect how FreeRTOS manages task context switching on ARM Cortex-M4 cores (STM32F4/G4 series) and how to avoid classic concurrency pitfalls.&lt;/p&gt;
&lt;h2 id="the-cortex-m-pendsv-exception"&gt;The Cortex-M PendSV Exception&lt;/h2&gt;
&lt;p&gt;FreeRTOS relies on the &lt;strong&gt;PendSV&lt;/strong&gt; (Pended Service Call) exception to perform context switches safely. Unlike hardware ISRs that must execute with minimal latency, PendSV is configured with the lowest interrupt priority.&lt;/p&gt;</description></item><item><title>About Me</title><link>https://embeddedcoffe.my.id/about/</link><pubDate>Sat, 01 Aug 2026 00:00:00 +0000</pubDate><guid>https://embeddedcoffe.my.id/about/</guid><description>&lt;p&gt;Hello! I&amp;rsquo;m &lt;strong&gt;Habib Rahman&lt;/strong&gt;, an embedded systems and firmware engineer passionate about low-level software architectures, bare-metal C programming, real-time operating systems, and mixed-signal hardware design.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Embedded Coffe&lt;/strong&gt; is my personal corner on the web where I document engineering notes, architecture deep dives, late-night hardware debugging sessions, and practical telemetry implementations.&lt;/p&gt;
&lt;hr&gt;
&lt;h2 id="what-i-work-on"&gt;What I Work On&lt;/h2&gt;
&lt;ul&gt;
&lt;li&gt;&lt;strong&gt;Bare-Metal &amp;amp; Microcontroller Firmware:&lt;/strong&gt; Writing deterministic drivers and bootloaders from scratch for ARM Cortex-M (STM32, NXP), RISC-V, and ESP32.&lt;/li&gt;
&lt;li&gt;&lt;strong&gt;Real-Time Operating Systems (RTOS):&lt;/strong&gt; Task scheduling, priority inversion mitigation, queue design, and memory protection using FreeRTOS and Zephyr.&lt;/li&gt;
&lt;li&gt;&lt;strong&gt;Marine &amp;amp; Industrial Telemetry:&lt;/strong&gt; CAN Bus (CAN 2.0B / CAN-FD), NMEA 2000 (J1939 PGN handling), isolated transceivers, and robust IoT telemetry gateways.&lt;/li&gt;
&lt;li&gt;&lt;strong&gt;Mixed-Signal Hardware Design:&lt;/strong&gt; Multi-layer PCB design in KiCad, ultra-low noise power supply rails for precision ADCs, and signal integrity considerations.&lt;/li&gt;
&lt;/ul&gt;
&lt;hr&gt;
&lt;h2 id="the-lab-bench"&gt;The Lab Bench&lt;/h2&gt;
&lt;p&gt;My daily engineering workflow revolves around hardware debuggers and measurement instruments:&lt;/p&gt;</description></item></channel></rss>